Friday, January 21, 2011

Skype discussion

  1. parallelize for JasPer 9/7 portion
  2. quantization, vectorization? parallelization?
  3. memory intel asm vectorization, copying stuff, 64bits, upto factor 2 by using the 128 bits. pin down the problems.
  4. packagelization, Rate/Distortion control, print the number separated by the comma,
  5. modify simplescalar to create 3-D memory access pattern graph
now counting access,
  • count the load and write sedately. 2 sets of counters,
  • print the sum of 2 numbers
  • spill out as 2 set of data for graphing
  • use more resolution, now using 80, pixel based, more pixel for memory and for time.
  • plot color, on 2D, color identify the density


Other images for testing
  • memory access pattern, (8k by 8k)
  • understand the behavior based on the different graph. printout the loop iterations, graph that?
take close look at the fusion
  • cache grind for the certain line of the code.
  • by counting access and miss in SimpleScalar.. from begin to the end of the fused loop.
  • graphical pixel approached to zoom into the fused loop behavior.

I/O problem - large time fraction
  • for the large image.
  • can get a better performance for I/O

Lab work
2 large FPGA board
look at clear system installation
try the equipment, and make sure it's working

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